AMD Epyc 7252 is based on the Rome (Zen 2) architecture. The total of cores is 8 with the threads of 16. The operating base core clock is 3.10 GHz. Turbo-boost is 3.20 GHz (per-core). The technology node is 7 nm. L2 Cache is , L3 Cache is 64.00 MB.
AMD Epyc 7252 supports the socket type of SP3.
The supported type and memory clock is DDR4-3200 MHz. The maximum RAM capacity is . The date of release is - Q3/2019.