AMD Epyc 7252 is based on the Rome (Zen 2) architecture. The total of cores is 8 with the threads of 16. The operating base core clock is 3.10 GHz. Turbo-boost is 3.20 GHz (per-core). The technology node is 7 nm. L2 Cache is , L3 Cache is 64.00 MB.
AMD Epyc 7252 supports the socket type of SP3.
The supported type and memory clock is DDR4-3200 MHz. The maximum RAM capacity is . The date of release is - Q3/2019.
The official technical specifications of the AMD Epyc 7252 CPU allow defining to what extent it is fast and efficient in the process and which system requirements for games and operational apps it can fit. Please learn the specs and benchmark results.
Technical specs
| Frequency: | 3.10 GHz | CPU Cores: | 8 | |
| Turbo (1 Core): | 3.20 GHz | CPU Threads: | 16 | |
| Hyperthreading: | Yes | Overclocking: | No | |
| Turbo (8 Cores): | 3.20 GHz |
| GPU (Turbo): | No turbo | Max. Memory: | -- |
| h264: | No | |||
| JPEG: | No | |||
| h265 8bit: | No | |||
| h265 10bit: | No | |||
| VP8: | No | |||
| VP9: | No | |||
| VC-1: | No | |||
| AVC: | No | |||
| Memory type: | DDR4-3200 | Memory channels: | 8 | |
| ECC: | Yes | PCIe version: | 4.0 | |
| PCIe lanes: | 128 |
| AES-NI: | Yes |
| TDP: | 120 W | Tjunction max.: | -- | |
| TDP up: | -- | TDP down: | -- |
| L3-Cache: | 64.00 MB | Technology: | 7 nm | |
| Architecture: | Rome (Zen 2) | Virtualization: | AMD-V, SEV | |
| Socket: | SP3 | Release date: | Q3/2019 | |
| Market price: | ca. 790 $ |
| Used in: | Unknown | |||
Please learn the testing results of the AMD Epyc 7252 CPU in synthetic benchmarks. These data can define the closest competitor and its current position in the models’ rating. Here are points in modern benchmarks, in which AMD Epyc 7252 has been tested. Pay attention that the data can differ in testing systems.
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